|
|
诚招有学习能力，做事认真的同学到碗里来（全职/实习）。
也欢迎资深工程师投递简历（社招）。
来创业公司的好处就是不当螺丝钉，实打实做核心项目，实打实学东西。
欢迎前来咨询及投递简历：lisa.hu@corigine.com，kai.cheng@corigine.com。
关于芯启源：
芯启源电子科技有限公司由中美高科技团队创建并运营管理，公司在美国硅谷、上海
张江自贸区、南京经开区、湖州开发区、香港等地设有公司和研发中心。公司致力于高科
技电子领域，高新技术与应用的研发和生产，在国际上，我们拥有全球业界一流的专业团
队和技术，技术骨干多人次参与国际行业标准的制定；在中国，我们为国家战略层面的芯
片自主知识产权研发和应用不断努力，研发项目中国第一家通过国际认证，目前已成为政
府大力支持的行业领先企业。
微信公众号搜索：芯启源。公司介绍：https://mp.weixin.qq.com/s/GA_09JeeoM_H6p9Ng
FeovQ
ASIC Design Engineer：6
1. 1~5 years ASIC design experience
2. BS or MS in Electrical Engineering.
3. Familiar with Verilog, good experience on design document creation and RTL
coding.
4. Design experience with PCIE/USB/SATA/ethernet or other connectivity protoco
ls is a plus.
5. Hands on experience with synthesis and STA.
6. Familiar with lint, CDC, formal verification methodologies.
7. Understanding of basic DFT concepts.
8. FPGA emulation experience is a plus.
9. Good communication and problem-solving skills.
10. Familiar with using of Logic Analyzer and Oscilloscope for debugging is a
plus.
FPGA Prototyping & Validation Engineer: 2
1. At least 3 years ASIC design experience
2. BS or MS in Electrical Engineering.
3. Demonstrated experience in the complete FPGA design validation cycle.
4. Good knowledge of RTL synthesis, FPGA implementation, HW bring-up, scriptin
g language, Unix/Linux development environment.
5. Good knowledge of implementing High Speed interface with Xilinx GTX/GTH/GTY
transceivers.
6. Good knowledge of using Logic Analyzer and Oscilloscope for debugging.
7. Familiar with connectivity protocols: PCIE/USB/SATA/Ethernet/DDR.
8. Familiar with Processor architecture and SOC prototyping is a plus.
9. Good communication skills, especially the ability to communicate technical
information effectively and work closely with design&driver engineer.
Design Verification Engineer：6
1. 1~5 years ASIC or FPGA verification experience
2. BS or MS in Electrical Engineering.
3. Hands on experience with Verilog, System Verilog and UVM
4. Familiar with coverage oriented random test
5. Familiar with PCIE/USB/SATA/ethernet or other connectivity protocols is a p
lus
6. Familiar with shell/perl/makefile is a plus
7. Good communication and problem-solving skills.
Senior Design Verification Engineer：1
1. Work with Design team to complete IP/ASIC production verification tasks
2. 4~6 years IP, ASIC or FPGA products verification experience
3. Should be able to build verification environment from scratch, set testplan
base on project schedule and resource
4. Should be able to guide junior engineer to boost verification tasks
5. Should be proficient in coverage oriented random test with System Verilog a
nd UVM
6. Should have hands on experience with shell/perl/make
7. Familiar with PCIE/USB/SATA/ethernet or other connectivity protocols is a p
lus
8. Good communication and problem-solving skills.
9. BS or MS in Electrical Engineering.
Senior Hardware Engineer : 1~2
1. Responsibilities:
1) Hardware Design for SerDes daughter card
2) Hardware Design for SoC reference platform
3) Board/System level circuit research and Development
4) Schematic concept design, Component selection and Bill of Material generati
on
5) Board/system level Hardware debug and verification
6) Guide PCB layout engineer for placement, power and high speed signals routi
ng,
2. Minimum Requirements:
1) BS/MSEE AND 3+ years of system and circuit/board design experience
2) Experience with high speed board design techniques
3) Experience with design tools (such as OrCad, Concept, Allegro, etc.)
4) Experience with Serders: USB3.1, PCI-E, SAS, SATA, HDMI, DP is a big plus
5) Experience with Knowledge of FPGA or embedded processors
6) Knowledge of SI/PI theory and the analytical capability
Software Engineer（Application）: 3
Representative Responsibilities
• Develops emulation and/or prototype system compilation database codes
and GUI.
• Develops emulation and/or prototype system runtime codes and runtime G
UI.
• Develops test for emulation and/or prototype system.
• Maintains project documentation.
• some experience working with emulation platforms such as: Palladium, V
eloce or Zebu, including compilation, debug, and performance tuning.
• debug hardware issues from waveforms
• Demonstrated experience with algorithm and data structure design.
• Demonstrated experience with software testing methods.
Minimum Requirements
• Minimum of BS/MS.
• Working knowledge of software languages (assembler, C, C++, etc.)
• Working knowledge if software development tools (compilers, debuggers,
emulators, etc.)
• Working knowledge of software development in Linux
• Experience in Verilog or VHDL and System Verilog is a plus.
• Requires good communication skills, attention to details, and ability
to work in multi-site/multi-person project
• Strong software development background.
Embedded Software Engineer（Driver/Firmware）: 3
Representative Responsibilities
• Develops Linux drivers under embedded system.
• Develops firmware or bare mental code under embedded system.
• Develops test for emulation and/or prototype system.
• Maintains project documentation.
• debug hardware issues from waveforms
• Demonstrated experience with algorithm and data structure design.
• Demonstrated experience with software testing methods.
Minimum Requirements
• Minimum of BS/MS.
• Working knowledge of software languages (assembler, C, C++, etc.)
• Working knowledge if software development tools (compilers, debuggers,
emulators, etc.)
• Working knowledge of software development in Linux
• Experience in USB/PCIE or FPGA is a plus.
• Requires good communication skills, attention to details, and ability
to work in multi-site/multi-person project
• Strong software development background.
实打实的福利：
1. 极具竞争力的薪酬待遇
2. 实习补贴270/天
3. 每日下午茶：咖啡厅、免费水果零食饮料
4. 节日（生日）福利
5. 自由开放的办公环境（免费健身房、游戏间、员工休息区）
6. 午餐补贴25/天，晚餐补贴20/天
7. 各种集体浪的机会
诚招有学习能力，做事认真的同学到碗里来（全职/实习）。
也欢迎资深工程师投递简历（社招）。
来创业公司的好处就是不当螺丝钉，实打实做核心项目，实打实学东西。
欢迎前来咨询及投递简历：lisa.hu@corigine.com，kai.cheng@corigine.com
|
|
发表于 2019-4-10 17:59:49
收藏